Over at diyhifi.org, user simmconn figured out how the clocks of the Musiland are synthesized (I've summarized here):

The Xilinx FPGA has two DCMs ("Digital Clock Managers"). They take an existing clock and perform integer multiplications and divisions in order to synthesize a new clock frequency. The frequencies required to handle all the sample rates are:

24.576MHz for 48KHz, 96KHz and 192KHz sample rate and

22.5792MHz for the 44.1KHz, 88.2KHz and 176.4KHz sample rate

The ratios for the DCMs to generate the required frequencies are as follows:

22.5792 MHz = 48 MHz*(14/25)*(21/25)

24.576 MHz = 48 MHz*(8/25)*(8/5)

Since there are two sets of ratios, the Xilinx chip needs to change them on the fly when sample rate changes (because the fpga used in the Musiland devices only has two DCMs).

Simmconn determined that (the earlier version of the drivers did not have this reconfiguration on the fly capability and) fixed ratios were used in the DCMs. He figured that in order to generate the two frequencies with static DCM m/n numbers, they had to select 24.576 MHz and a frequency close to 22.5792 MHz:

22.588235 MHz = 48 MHz*(8/17) -Using the first DCM

24.576 MHz = 48 Mhz X2 (using clock multiplier function of fpga) = 96 MHz; 96MHz*(32/25)= 122.88 MHz -Using the second DCM; externally divide by 5 using clock division of fpga.

if we divide this frequency by 512 (you divide by some multiple of 64 which is sort of the minimum fs), we can calculate the resultant sample frequency:

22.588235/512 = 44,117.6 Hz (Approximation)

24.576/512 = 48,000 Hz (Exact)

I previously measured MCK from the I2S lines of the Musiland MINI model:

For 44.1K Material:

For 48K Material

I also determined that fs was 128. If we use these numbers we determine that the sample frequency

5,647,218/128= 44,118.9 Hz which confirms the deviation from 44,000 Hz

6,144,177/128= 48,001 Hz which confirms that the sample rate is exact.

This was the way clocks were generated...

The Xilinx FPGA has two DCMs ("Digital Clock Managers"). They take an existing clock and perform integer multiplications and divisions in order to synthesize a new clock frequency. The frequencies required to handle all the sample rates are:

24.576MHz for 48KHz, 96KHz and 192KHz sample rate and

22.5792MHz for the 44.1KHz, 88.2KHz and 176.4KHz sample rate

The ratios for the DCMs to generate the required frequencies are as follows:

22.5792 MHz = 48 MHz*(14/25)*(21/25)

24.576 MHz = 48 MHz*(8/25)*(8/5)

Since there are two sets of ratios, the Xilinx chip needs to change them on the fly when sample rate changes (because the fpga used in the Musiland devices only has two DCMs).

Simmconn determined that (the earlier version of the drivers did not have this reconfiguration on the fly capability and) fixed ratios were used in the DCMs. He figured that in order to generate the two frequencies with static DCM m/n numbers, they had to select 24.576 MHz and a frequency close to 22.5792 MHz:

22.588235 MHz = 48 MHz*(8/17) -Using the first DCM

24.576 MHz = 48 Mhz X2 (using clock multiplier function of fpga) = 96 MHz; 96MHz*(32/25)= 122.88 MHz -Using the second DCM; externally divide by 5 using clock division of fpga.

if we divide this frequency by 512 (you divide by some multiple of 64 which is sort of the minimum fs), we can calculate the resultant sample frequency:

22.588235/512 = 44,117.6 Hz (Approximation)

24.576/512 = 48,000 Hz (Exact)

I previously measured MCK from the I2S lines of the Musiland MINI model:

For 44.1K Material:

For 48K Material

I also determined that fs was 128. If we use these numbers we determine that the sample frequency

5,647,218/128= 44,118.9 Hz which confirms the deviation from 44,000 Hz

6,144,177/128= 48,001 Hz which confirms that the sample rate is exact.

This was the way clocks were generated...

**A NEW DRIVER...**

This week Musiland released a new driver that reconfigures the two DCMs when the sample rate changes, and generates two clocks with exact frequency to support the different sample rates

The driver has two Sample Rate Control modes:- Fast Mode and Precision Mode. Fast Mode is like before: the DCMs are statically configured and the 44.1KHz family clock has a small error.
- Precision Mode reconfigures the DCMs when there is change in sample rate family (e.g. from 44.1 to 48KHz) and the resultant clock is exact.

## 6 comments:

Dear GLT

I have made as promised few pictures of my Musiland 01US with I2S wires.

But also after reading Your latest post regarding "precision" clocks of Musiland I have made few measurements of my Musiland with old drivers 1.0.5 and I would like to send You some results regarding clocks. The results are at list "interesting" but I relay thing it would be better to confirm them with Your Musiland and setup to be sure that I did not made some major mistake during my Musiland play. So If You could give me the emaill or some other way I could send You few pictures and few lines of explanation would be interesting to see Your opinion on that.

regards

Rosendorfer/Greg

Hi Greg,

send me a private email through diyaudio or head-fi

Hi Greg or send email to:

hifiduino {aT) yahoo (dot] com

Dear GLT

Finally I managed to send You an mail.

I hope You will get this as there are 6Mb of pictures.

I hope at list few will be interesting to have a look at.

Regards

Greg

Dear GLT

I have found the reason of my "findings" and this definetely hasn't got anything with Musiland or DAC.

The problem is me reading internet without proper understanding.

Sorry that I did take Your time with my silly "findings".

Greg

waooo... such a nice topic ... cool blog .

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